Parit and Tamura received VDEC Design Award Encouragement Prize

01/20/2017

Parit and Tamura received VDEC Design Award Encouragement Prize at IEEE ASP-DAC

Title

CMOS-on-Quartz Pulse Generator for Low Power Applications
A 15 x 15 SPAD Array Sensor with Breakdown-Pixel-Extraction Architecture for Efficient Data Readout