Japanese version is here.
- Reliability and Signal Integrity on LSI circuits.
- LSI Test
- Design Automation of Analog Circuits
- Current Belongings and title
Associate Professor, Dept. of Electrical Engineering and Information Systems in the University of Tokyo
- Education and Work Experience
B.S. course of Electronics Engineering, The University of Tokyo.
"Back Gate Effects on Thin Film SOI Transistors" (Asada Lab.)
M.S. course of Electronics Engineering, The University of Tokyo.
"Parameter Extraction from subthreshold spectra on DistributeFeedback Semiconductor Lasers" (Nakano Lab.)
System LSI Development center, MITSUBISHI Electric Corporation.
High-speed circuit design with SOI
R&D group in Oregon, U.S.A, Avant! Corporation.
Develop EDA tool for LSI design (Lokahi, Cosmos, VHDL-AMS, HSPICE-XT/RF)
Ph.D course of Electronics Engineering, The University of Tokyo.
"A Study on Power Line Noise Reduction in Large Scale Integration" (Asada Lab.)
System Device Laboratory, NEC Corporation
Analog circuit design, including PLL and RF
VDEC (VLSI Design and Education Center), The University of Tokyo.
Dept. of Electrical Engineering and Information Science, The University of Tokyo.
Nikkei IP Design Award "Best IP Award"
IP Based Design Conference & Exhibition (IP-SoC 2005) "Best Paper Award"
IEICE "Best Paper Award" in 2005
IEICE "Best Paper Award" in 2012
Analog RF CMOS Integrated Circuit Design (Advanced) (Chapter 12, 13, 22)
Essential Knowledge for Transistor-Level LSI Circuit Design [Springer]
- Streaming Lecture
Common Knowledge for LSI Design
e-mail : email@example.com
FAX : +81-3-5841-8912
address : 2-11-16 Yayoi Bunkyo-ku, Tokyo, 113-0032
Room411, Takeda Bldg., Univ. of Tokyo
Fukuoka Pref. Japan
- Date of Birth
- Blood type
Badminton, Reading, Running
Technologies come from Love
Home page of Asada Lab.
Home page of E.E. Dept of Tokyo Univ.
Toru Nakura (firstname.lastname@example.org)