Ikeda Lab.

Publications

  • K. Asada, M. Ikeda, B.S. Devlin, and T. Sogabe, "[Keynote] Self-Synchrounous Circuits with Completion/Error Detection as a Candidate of Future LSI Resilient for PVT Variations and Aging," 25th International Symposium on, pp.3, 6-8,Oct. 2010.
  • B.S. Devlin, M. Ikeda, and Kunihiro Asada, "Evaluation on the Reliable Operation of a Gate-Level Pipelined Self Synchronous System Against PVT and Aging," International Integrated Reliability Workshop 2010,Oct. 2010.
  • K. Hattori, K. Asada, and M. Ikeda, "Hardware design for Real-time 3D Mesh Generation," ITE Technical Report, vol. 62, pp. 57-60,Oct. 2010.
  • N.N.M. Khanh, M. Sasaki, and K. Asada, "A 0.25-μm SiGe Millimeter-wave Damping Pulse Transmitter Chip with On-chip Loop Antenna Array," the 35th IRMMW-THz 2010, Roma, Italia, Sep. 2010.
  • T. Iizuka, J. Jeong, T. Nakura, M. Ikeda, and K. Asada, "All-Digital On-Chip Monitor for PMOS and NMOS Process Variability Measurement Utilizing Buffer Ring with Pulse Counter," IEEE European Solid-State Circuits Conference, Sevilla, Spain, pp. 182-185,Sep. 2010.
  • S. Mandai, T. Iizuka, T. Nakura, M. Ikeda, and K. Asada, "Time-to-Digital Converter Based on Time Difference Amplifier with Non-Linearity Calibration," IEEE European Solid-State Circuits Conference, Sevilla, Spain, pp. 266-269,Sep. 2010.
  • M. Ikeda, "Analysis on Characteristics of Light Transmission for Multiple-metal Layer Nano-meter CMOS," ITE Technical Report, vol. 45, pp. 21-24,Sep. 2010.
  • 小松 聡,Mohamed Abbas,古川靖夫,浅田邦博,(招待講演) , "ディジタルアシストアナログ回路向けの自動テスト生成フレームワーク," 信学技報, vol. 110, no. 210, VLD2010-46, pp. 25-30,Sep. 2010.
  • J. Jeong, T. Iizuka, T. Nakura, M. Ikeda, and K. Asada, "Characterization of Reduced-area All Digital Process Variability Monitor," 電子情報通信学会 ソサイエティ大会論文集, C-12-23, p. 84,Sep. 2010.
  • J. Kim, T.Nakura, H. Takata, K. Ishibashi, M. Ikeda, and K. Asada, "On-Chip Supply Resonance Noise Reduction Method for Multi-IP Cores Utilizing Parasitic Capacitance of Sleep Blocks," IEICE Technical Report, vol. 110, no. 182, pp. 1-4, Aug. 2010.
  • Y. Tamaki, T. Nakura, M.Ikeda and K. Asada, "A Toggle-Type Peak Hold Circuit for Local Power Supply Noise Detection," IEEE The Asia Symposium on Quality Electronic Design, Penang, Malaysia, pp.29-32,Aug. 2010.
  • N.N.M. Khanh, M. Sasaki, K. Asada and T. Monma, "A 0.18-μm CMOS Millimeter Wave Pulse Generator with Onchip Antenna and Digitally Programmable Timed Delay Circuit," Asia Symposium on Quality Electronic Design (ASQED), Penang, Malaysia, Aug. 2010.
  • Nguyen Ngoc Mai Khanh, M. Sasaki, K. Asada and T. Monma, "A 0.18-μm CMOS Millimeter Wave Pulse Generator with Onchip Antenna and Digitally Programmable Timed Delay Circuit," Asia Symposium on Quality Electronic Design (ASQED), Penang, Malaysia, Best Paper Award, Aug. 2010,
  • S. Mandai, T. Nakura, M. Ikeda, and K. Asada, "A 8bit Two Stage Time-to-Digital Converter using Time Difference Amplifier," IEICE Electronics Express, vol. 7, no.13, pp. 943-948 Jul. 2010.
  • B.S. Delvin, T. Nakura, M. Ikeda, and K. Asada, "A Low Power and High Throughput Self Synchronous FPGA Using 65 nm CMOS with Throughput Optimization by Pipeline Alignment," IEICE Trans. On Electronics,Vol. E93-A, pp. 1319-1328,Jul. 2010.
  • J. Kim, T. Nakura, H. Takada, K. Ishibashi, M. Ikeda, and K. Asada, "On-Chip Supply Resonance Noise Reduction Method for Multi-IP Cores Utilizing Parasitic Capacitance of Sleep Block," IEICE Technical Report, vol. 110, no. 182, pp. 1-4,Jul. 2010.
  • T. Iizuka, T. Nakura, and K. Asada, "Buffer-Ring-Based All-Digital On-Chip Monitor for PMOS and NMOS Process Variability Effect," IEICE Technical Report, vol. 110, no. 140, pp. 15-20,Jul. 2010.
  • J. Kim, T. Nakura, H. Takata, K. Ishibashi, M. Ikeda, and K. Asada, "Resonant Supply Noise Canceller Utilizing Parasitic Capacitance of Sleep Blocks," in Proceedings of IEEE/JSAP Symposium on VLSI Circuit, pp. 119-120,Jun. 2010.
  • N.N.M. Khanh, M. Sasaki and K. Asada, "A CMOS Pulse Beamforming Transmitter Design with On-chip Antenna Array for Millimeter-wave Imaging Applications," The 5th International Conf. on Future Information Technology (FutureTech2010), Busan, Korea, May. 2010.
  • X. Song, K. Kim, M. Sasaki, and M. Ikeda, "Skewed Pixel Arrays Optical Position Sensor for High Accuracy," ITE Technical Report, vol. 23, pp. 5-8,May. 2010,