Ikeda Lab.

Conference

  • Takashi Maruyama, Hiroshi Takita, Rimon Ikeno, Morimi Osawa, Yoshinori Kojima, Shinji Sugatani, Hiromi Hoshino, Toshio Hino, Masaru Ito, Tetsuya Iizuka, Satoshi Komatsu, Makoto Ikeda, and Kunihiro Asada, "Practical Proof of CP Element Based Design for 14nm Node and Beyond," in Proceedings of the SPIE Advanced Lithography (Alternative Lithographic Technologies V), Vol. 8680, Feb. 2013.
  • Nguyen Ngoc Mai-Khanh and Kunihiro Asada, "A CMOS Fully Integrated Antenna System Transceiver with Beam-formability for Millimeter-wave Active Imaging," in Proceedings of IEEE 13th Silicon Monilithic Integrated Circuit in RF Systems (SiRF), paper 123 - 125 Jan. 2013.
  • Rimon Ikeno, Takashi Maruyama, Tetsuya Iizuka, Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada, "High-throughput Electron Beam Direct Writing of VIA Layers by Character Projection using Character Sets Based on One-dimensional VIA Arrays with Area-efficient Stencil Design," in Proceedings of 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013), pp.255-260, Jan. 2013.
  • So Saito, Toru Nakura, Tetsuya Iizuka, Makoto Ikeda, and Kunihiro Asada, "Resonant Noise Reduction of DVS Using Active Charge Sharing," STARC Symposium 2013, Student Poster Session, Jan. 2013.
  • Masahiro Ishida, Toru Nakura, Toshiyuki Kikkawa, Takashi Kusaka, Satoshi Komatsu, and Kunihiro Asada, "Power Integrity Control of ATE for Emulating Power Supply Fluctuations on Customer Environment," in Proceedings of IEEE International Test Conference (ITC), paper 7.3, Nov. 2012.
  • Toru Nakura, Tetsuya Iizuka, Kunihiro Asada, "Impact of All-Digital PLL on SoC Testing," in Proceedings of the 21st IEEE Asian Test Symposium (ATS), pp. 252-257, Nov. 2012.
  • T. J. Yamaguchi, K. Asada, K. Niitsu, M. Abbas, S. Komatsu, H. Kobayashi, J. A. Moreira "A New Procedure for Measuring High-Accuracy Probability Density Functions," 2012 IEEE Asian Test Symposium, pp.185-190, Nov. 2012.
  • B. Devlin, M. Ikeda, K. Asada "A Self Synchronous FPGA with Leakage Control for 270mV Sub-threshold Operation," IEEE/ACM Workshop on CAD for Multi-Synchronous and Asynchronous Circuits and Systems (MSCAS) 2012, Nov. 2012.
  • B. Devlin, H. Mori, S. Miyauchi, M. Ikeda, K. Asada "Performance and Side-channel Attack Analysis of a Self Synchronous Montgomery Multiplier Processing Element for RSA in 40nm CMOS" Asian Solid-State Circuits Conference (A-SSCC) 2012, pp. 385-388, 12-14, Nov. 2012.
  • K. Kodama and M. Ikeda, "Target Voltage Independent Capacitance Measurement Circuit Implemented by 0.18 um CMOS for PWM-MEMS Control" IEEE International SoC Design Conference (ISOCC), pp. 77-80, Jeju, Korea, Nov. 2012.
  • Nguyen Ngoc Mai-Khanh, Tetsuya Iizuka, Makoto Yamada, Osamu Morita, Kunihiro Asada, "An Integrated High-Precision Probe System for Near-Field Magnetic Measurements on Cryptographic LSIs," in Proceedings of IEEE Sensors 2012, pp. 2074-2077, Oct. 2012.
  • Toru Nakura, Yoshio Mita, Tetsuya Iizuka, Kunihiro Asada, "7.5Vmax Arbitrary Waveform Generator with 65nm Standard CMOS under 1.2V Supply Voltage," in Proceedings of IEEE Custom Integrated Circuits Conference (CICC), Sep. 2012.
  • S. Saito, T. Nakura, T. Iizuka, K. Asada, "Resonant Supply Noise Reduction Using Active Charge Sharing of Dynamic Voltage Scaling" in Proc. of IEICE Society Conference, C-12-41, p. 114,Sep. 2012.
  • Kunihiro Asada, Toru Nakura, Tetsuya Iizuka, "Review and Future Prospects on Time-Domain Analog Approach," The second Solid-State Systems Symposium 2012 (4S-2012), Aug. 2012.
  • Makoto Ikeda, Tetsuya Iizuka, Satoshi Komatsu, Masahiro Sasaki, Toru Nakura, and Kunihiro Asada, "Intelligent-PAD2.0: Platform for On-line SoC Health Condition Monitoring," European Workshop on Microelectronics Education (EWME), May. 2012.
  • B. Devlin, M. Ikeda, and K. Asada, "Gate-level Process Variation Offset Technique by using Dual Voltage Supplies to Achieve Near-threshold Energy Efficient Operation," IEEE Symposium on Low-Power and High-Speed Chips (COOL chips XV), Yokohama, Japan, Apr. 2012.
  • T.-W. Chen and M. Ikeda, "A Millimeter-Wave Resistor-less Pluse Generator with a New Diple-Patch Antenna in 65-nm CMOS," IEEE Symposium on Low-Power and High-Speed Chips (COOL chips XV), Yokohama, Japan, Apr. 2012.
  • M. Abbas, T. J. Yamaguchi, Y. Furukawa, S. Komatsu, K. Asada, "Low Delay Dispersion Comparator for Level-Crossing ADCs," 2012 Japan-Egypt Conference on Electronics, Communications and ComputersMar. 2012.
  • X. Fu, M. Ikeda "Evaluation of Background Light Suppression Characteristic and Range Finding Accuracy for 3-D Measurement using Smart Imgae Sensor," ITE Technical Report, Vol. 36, No. 18, pp. 27-30,Mar. 2012.
  • Takashi Maruyama, Yasuhide Machida, Shinji Sugatani, Hiroshi Takita, Hiromi Hoshino, Toshio Hino, Masaru Ito, Akio Yamada, Tetsuya Iizuka, Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada, "CP Element Based Design for 14nm Node EBDW High Volume Manufacturing," in Proceedings of the SPIE Advanced Lithography (Alternative Lithographic Technologies IV), Vol. 8323, Paper 8323-39,Feb. 2012.