池野 理門 and 浅田 邦博,
"Stable Solution for SOI MOSFET Simulation by Quasi-Transient Method,"
第43回応用物理学会関係連合講演会, Mar. 1996,
池田 誠 and 浅田 邦博,
(in Japanese) "ビット幅可変方式を用いた加算機による消費電力削減,"
電子情報通信学会総合大会, C-555, Mar. 1996,
池野 理門 and 浅田 邦博,
(in Japanese) "準過渡解析手法によるSOI MOSFETシミュレーションの安定解法,"
第43回応用物理学会関係連合講演会, 26p-H-3, Mar. 1996,
三堂 哲寿 and 浅田 邦博,
(in Japanese) "集積回路内の相互接続配線における誘導性を考慮した伝送線路シミュレーッション,"
第43回応用物理学会関係連合講演会, 26p-H-11, Mar. 1996,
小松 聡, 池野 理門, 伊藤 浩, and 浅田 邦博,
(in Japanese) "DTMOSのドレイン電流特性のデザインパラメータ依存性,"
第43回応用物理学会関係連合講演会, 26p-H-4, Mar. 1996,
鄭 若丹, 池田 誠, and 浅田 邦博,
"A Synchronous Completion Prediction Adder (SCPA),"
電子情報通信学会総合大会, Cー554, Mar. 1996,
H.Ito and K.Asada,
"Modeling of Leak Current Characteristics in High Frequency Operation of CMOS Circuits Fabricated on SOI Substrate,"
IEICE Trans. on Electronics, Vol.E79-C,No.2, pp.185-191, Feb. 1996,
三堂 哲寿 and 浅田 邦博,
"Crosstalk Noise Considering Inductive Coupling in Strip Wires in Heterogeneous Insulators,"
回路実装学会 第7回ワークショップ, Jan. 1996,
S. Suzuki, M. Fujishima, M. Tsuchiya, and K. Asada,
(in Japanese) "学部3年後期実験におけるCMOSゲートアレイの作製,"
東京大学工学部・工学系研究科紀要, A-34、pp.96-97, 1996,
鈴木真一, 藤島 実, 土屋 昌弘, and 浅田 邦博,
(in Japanese) "学部3年後期実験におけるCMOSゲートアレイの作製,"
東京大学工学部・工学系研究科紀要, A-34、pp.96-97, 1996,
池田 誠, 李 知漢, and 浅田 邦博,
"Power Reduction and Performance Improvement in VLSIs,"
IEICE 琵琶湖ワークショップ, pp.41-45, 1996,
T. S. Cheung, K.Asada, K.L.Yip, and Y.C.Cheng,
"Low Power CMOS Digital Circuit Design with Reduced Voltage Swing,"
Proc.IEEE TENCON '95, pp.311-314, Nov. 1995,
T. S. Cheung and K.Asada,
"Clock Separated Logic:A Double-Rail Latch Circuit Technique for High Speed Digital Design,"
Proc.IEEE TENCON '95 IEEE Region 10 Conf.on VLSI, pp.303-306, Nov. 1995,
R.Ikeno, H.Ito, and K.Asada,
"One-Dimensional Analysis of Subthreshold Characteristics of SOI-MOSFET Considering Quantum Mechanical Effects,"
Special Issue on Computational Electronics,The Fourth International Workshop on Computational Electronics (IWCE-4), Gordon & Breach Science Publishers, pp.65-67, Nov. 1995,
Makoto Ikeda and K. Asada,
"Data Bypassing Register File for Low Power Microprocessor,"
IEICE Transaction on Electronics, Vol.E78-C, No.10, pp.1470-1472, Oct. 1995,
R. Ikeno, H.Ito, and K.Asada,
"One-Dimensional Analysis of Subthreshold Characteristics of SOI-MOSFET Considering Quantum Mechanical Effects,"
4th International Workshop on Computational Electronics, P11, Oct. 1995,
秋田 純一 and 浅田 邦博,
"A Signal Scanning Method of Sensors with Hierarchal Structure of Node Automata,"
電子情報通信学会 技術報告, Vol.95. pp.71-78, Sep. 1995,
三堂 哲寿 and 浅田 邦博,
"Crosstalk Noise Considering Inductive Coupling in VLSI Interconnections in Heterogeneous Insulators,"
電子情報通信学会 VLSI設計研究会、通信学会技術報告, Vol.95,No.232,pp.69-74, Sep. 1995,
Christoph Wasshuber and K. Asada,
"Non-Approximate Evaluation of Macroscopic Quantum Tunneling of Charge for the Two-Junction Case at Arbitrary Temperatures and Bias Voltages,"
Jpn.J.Appl.Phys. , Vol.34(1995), PP.l1230-l1233, Part 2, No.9B, Sep. 1995,
池田 誠, 李 知漢, and 浅田 邦博,
"Design of Pseudo Asynchronous Microprocessor Using Synchronous Completion Detection Adder,"
電子情報通信学会 集積回路設計研究会, ED95-87, pp.95ー100, Sep. 1995,