T. Nakura, M. Ikeda, and K. Asada,
"Power Supply di/dt Measurement using On-chip di/dt Detector Circuit,"
IEEE Symposium on VLSI Circuits (VLSI Symp.) Dig. of Tech., Papers, pp. 106 -- 109,Jun. 2004,
Y. Oike, M. Ikeda, and K. Asada,
"A High-Speed XGA 3-D Image Sensor and Its Applications,"
in Proc. of the 6th Biannual World Automation Congress (WAC 2004),Jun. 2004,
Y. Oike, M. Ikeda, and K. Asada,
"A High-Speed 3-D Range Finder Using Row-Parallel Search Architecture,"
IEICE Technical Report, vol. 104, no. 174, pp. 7 - 10,Jun. 2004, (in Japanese).
T. Nakura, M. Ikeda, and K. Asada,
"On-chip di/dt Detector Circuit for Power Supply Line,"
in Proc. of IEEE International Conference on Microelectronic Test Structure (ICMTS), pp.19-22,Mar. 2004,
T. Iizuka, M. Ikeda, and K. Asada,
"Exact Wiring Fault Minimization via Comprehensive Layout Synthesis for CMOS Logic Cells,"
in Proc. of IEEE International Symposium on Quality Electronic Design (ISQED), pp. 377 - 380,Mar. 2004,
K. Asada, Y. Oike, and M. Ikeda,
"Three Dimensional Image Sensor for Real Time Application Based on Triangulation,"
in Proc. of International Symposium on Electronics for Future Generations, pp. 95 - 100,Mar. 2004,
T. Nakura, M. Ikeda, and K. Asada,
"Recent Trend of Circuit Designs,"
JIEP Technical Report, pp.131-132,Mar. 2004,
Y. Oike, M. Ikeda, and K. Asada,
"A High-Speed and Low-Voltage Associative Co-Processor Using Word-Parallel and Hierarchical Search Architecture,"
in Proc. of IEICE General Conferece 2004, C-12-34, pp. 138,Mar. 2004,
H. Ikehata, M. Song, M. Ikeda, and K. Asada,
"Comparison between DCVSL Domino and Static CMOS by High Speed MULTIPLIER,"
in Proc. of IEICE General Conferece 2004, A-1-13, pp. 13,Mar. 2004,
T. Ogawa, M. Ikeda, and K. Asada,
"Analysis on Contactless Data Transfer Systems between System LSIs,"
in Proc. of IEICE General Conferece 2004, A-1-22, pp. 22,Mar. 2004,
Y. Yachide, Y. Oike, M. Ikeda, and K. Asada,
"3D Measurement Method in an Arbitrary Viewpoint Based on Light-Section Method by Using Smart Image Sensor,"
ITE Technical Report, Vol. 28, No. 20, pp. 33 - 36,Mar. 2004,
Y. Oike, M. Ikeda, and K. Asada,
"HA 375 x 365 3D 1k frame/s Range-Finding Image Sensor with 394.5 kHz Access Rate and 0.2 Sub-Pixel Accuracy,"
IEEE International Solid-State Circuits Conference (ISSCC) Dig. of Tech, Papers, pp. 118 - 119,Feb. 2004,
Y. Oike, M. Ikeda, and K. Asada,
"A 375x365 3D 1k frame/s Range-Finding Image Sensor with 394.5kHz Access Rate and 0.2 Sub-Pixel Accuracy,"
IEEE International Solid-State Circuits Conference (ISSCC) Deg. of Tech. Papers, pp.118-119,Feb. 2004.
Y. Oike, M. Ikeda, and K. Asada,
"Design of Real-Time VGA 3-D Image Sensor Using Mixed-Signal Techniques,"
in Proc. of IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 523 - 524,Jan. 2004,
T. Iizuka, M. Ikeda, and K. Asada,
"High Speed Layout Synthesis for Minimum-Width CMOS Logic Cells via Boolean Satisfiability,"
in Proc. of IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 149 - 154,Jan. 2004,
U. Ekinciel, H. Yamaoka, H. Yoshida, M. Ikeda, and K. Asada,
"Constraint Driven Dual-Rail PLA Module Generator with Embedded 2-Input Logic Cells,"
in Proc. of IEEE Mediterranean Electrotechnical Conference (MELECON), pp. 189 -- 192,May 2004,
Y. Oike, M. ikeda, and K. Asada,
"Design of Real-Time VGA 3-D Image Sensor Using Mixed-Signal Techniques,"
IEEE Asia and South Pacific Design Automation Conference (ASP-DAC)Jan.. 2004,(the Best Design Award).
Y. Oike, M. Ikeda, and K. Asada,
"An Image Sensor with High-Speed Feeble ID Beacon Detection for Augmented Reality System,"
in Proc. of ITE Winter Conference 2003, 4-1, pp. 34,Dec. 2003,
T. Iizuka, M. Ikeda, and K. Asada,
"Exact Wiring Fault Minimization via Comprehensive Layout Synthesis for CMOS Logic Cells,"
IEICE Technical Report, vol. 103, no. 476, pp. 157 - 161,Nov. 2003,
T. Nakura, M. Ikeda, and K. Asada,
"Power Supply Noise Reduction using Stubs,"
IEICE Technical Report, vol. 103, no. 476, pp. 217 - 222,Nov. 2003,