Y. Oike, H. Shintaku, S. Takayama, M. Ikeda, and K. Asada,
"Real-Time and High-Resolution 3-D Imaging System Using Light-Section Method and Smart CMOS Sensor,"
in Proc. of IEEE International Conference on Sensors (IEEE SENSORS), pp. 502 - 507,Oct. 2003,
Y. Oike, M. Ikeda and K. Asada,
"High-Performance Photo Detector for Correlative Feeble Lighting Using Pixel-Parallel Sensing,"
IEEE Sensors Journal 2002 Sensors Conf. Florida, Vol.3, No.5, pp.640-645,Oct. 2003,
Y. Oike, M. Ikeda, and K. Asada,
"A Smart Image Sensor With High-Speed Feeble ID-Beacon Detection for Augmented Reality System,"
in Proc. of European Solid-State Circuits Conference (ESSCIRC), pp.125 - 128,Sep. 2003,
H. Yamaoka, M. Ikeda, and K. Asada,
"A High-Speed Logic Circuit Family with Interdigitated Array Structure for Deep Sub-Micron IC Design,"
Proceedings of European Solid-State Circuits Conference (ESSCIRC), pp. 189-192, Portugal,Sep. 2003,
Y. Oike, M. Ikeda, and K. Asada,
"A High-Speed and Low-Voltage Associative Co-Processor With Hamming Distance Ordering Using Word-Parallel and Hierarchical Search Architecture,"
in Proc. of IEEE Custom Integrated Circuits Conference (CICC), pp.643 - 646,Sep. 2003,
T. Nakura, M. Ikeda, and K. Asada,
"Theoretical Study of Stubs for Power Line Noise Reduction,"
in Proc. of IEEE Custom Integrated Circuits Conference (CICC), 31-4, pp.715-718, Sep. 2003,
Y. Oike, M. Ikeda and K. Asada,
"A High-Speed and Low-Voltage Associative Co-Processor With Hamming Distance Ordering Using Word-Parallel and Hierarchical Search Architecture,"
in Proc. of IEEE Custom Integrated Circuits Conference (CICC), pp.643-646,Sep. 2003,
Y. Oike, H. Shintaku, M. Ikeda and K. Asada,
"A Real-Time and High-Resolution 3-D Imaging System Using Smart CMOS Image Sensor,"
in Proc. of ITE Annual Conference 2003, 20-9, pp. 299-300,Aug. 2003,
T. Iizuka, M. Ikeda, and K. Asada,
"Cell Layout Synthesis via Boolean Satisfiability,"
in Proc. of IPSJ DA Symposium 2003, pp. 139 - 144,Jul. 2003,
Y. Oike, M. Ikeda, and K. Asada,
"640x480 Real-Time Range Finder Using High-Speed Readout Scheme and Column-Parallel Position Detector,"
IEEE Symposium on VLSI Circuits (VLSI Symp.) Dig. of Tech, Papers, pp.153 - 156,Jun. 2003,
K. Asada, Y. Oike, M. Ikeda,
"Intelligent Imaging and Pre-Processing: Real-Time/Robust 3-D CMOS Imager,"
in Proc. of Scientific Research on Priority Areas Symposium,pp.3-15,Mar. 2003,
H. Shintaku, Y. Oike, S. Takayama, M. Ikeda, and K. Asada,
"Design of FPGA for Real-Time 3-D Imager Control and Fast Data Transmission,"
in Proc. of IEICE General Conference 2002, D-11-67, pp.67,Mar. 2003,
Y. Oike, M. Ikeda, and K. Asada,
"640x480 Real-Time Range Finder Based on Light-Section Method,"
ITE Technical Report, vol. 27, no. 25, pp.1-4,Mar. 2003,
S. Sugiyama, M. Ikeda and K. Asada,
"Quick Noise Estimation Using Multi Terminal F-matrix in Power Grid Model,"
IEICE Tech. Report, Vol. 102, No. 683, VLD 2003-150, pp. 25-30,Mar. 2003,
T. Yamamoto, M. Ikeda and K. Asada,
"Inductance Calculation for Rectangle Section Form Wiring using GMD,"
IIEICE Gen. Conf., A-3-16, pp. 83,Mar. 2003,
H. Yamaoka, M. Ikeda, and K. Asada,
"A High-Speed Functional Memory with a Capability of Hamming-Distance-Selective Data Search Using Threshold Logic Circuits,"
IEICE Technical Report, VLD2002-151, pp. 31-36, Campus Plaza Kyoto,Mar. 2003,
U. Ekinciel, H. Yamaoka, M. Ikeda, and K. Asada,
"Performance Driven Design Methodology for a Dual-Rail PLA with 2-Input Logic Cells,"
IEICE Technical Report,VLD2003, Mar. 2003,
Y. Oike, M. Ikeda, and K. Asada,
"An Active Range Finder With the Capability of -18 dB SBR, 48 dB Dynamic Range and 120 x 110 Pixel Resolution,"
IEEE International Solid-State Circuits Conference (ISSCC) Dig. of Tech. Papers, pp.208 - 209, Feb. 2003,
Y. Oike, M. Ikeda, and K. Asada,
"High-Speed Position Detector Using New Row-Parallel Architecture For Fast Collision Prevention System,"
in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), Vol. 4, pp.788 - 791,May 2003,