Ikeda Lab.

Conference

会議等での発表

全て
会議等での発表
学術論文
表彰
その他
  • 池野理門，丸山隆司，飯塚哲也，小松聡，池田誠，浅田邦博, "キャラクタプロジェクションによる電子ビーム直描技術におけるビア層のスループット向上とステンシル面積削減のための配線設計およびキャラクタ抽出" DAシンポジウム2012論文集, 情報処理学会シンポジウムシリーズVol.2012, No.5, 5B-2, pp.187-192,Aug 2012.
  • Rimon Ikeno, Takashi Maruyama, Tetsuya Iizuka, Satoshi Komatsu, Makoto Ikeda, and Kunihiro Asada, "Interconnect Design and Character Extraction Method for Throughput Enhancement and Stencil Area Reduction of VIA Layer Exposure for Electron Beam Direct Writing with Character Projection Technique," in Proceedings of IPSJ DA Symposium 2012,Aug 2012.
  • K. Kodama, T. Iizuka, T. Nakura, K. Asada, "Frequency Resolution Enhancement for Digitally-Controlled Oscillator based on a Single-Period Switching Scheme" The Workshop about LSI and Systems 2012, Kokura, Japan, May 2012.
  • K.Kodama and M. Ikeda "High-Voltage Capacitance Measurement Circuit for MEMS-Integrated LSI", IEICE Technical Report, vol. 111, no. 497, pp. 7-12,Mar. 2012 .
  • T. W. Chen and M. Ikeda "Analysis of On-Line Clustering Algorithm for Low-Power Hardware Implementation," IEICE General Conference 2012, D-6-4,Mar. 2012 .
  • T. Kikkawa, T. Nakura, K. Asada "An Effect of Variability to RF Circuits for Phased Array Systems," IEICE General Conference 2012, C-12-71,Mar. 2012 , (in Japanese).
  • H. Yabe and M. Ikeda "A study on improving modulated light detection performance in the presence of background light," IEICE General Conference 2012, C-12-34,Mar. 2012 .
  • M. Abbas, T. J. Yamaguchi, Y. Furukawa, S. Komatsu, K. Asada, "Novel technique for minimizing the comparator delay dispersion in 65nm CMOS technology," 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 220-223,Dec. 2011.
  • B. Devlin, M. Ikeda, and K. Asada, "Gate-Level Autonomous Watchdog Circuit for Error Robustness Based on a 65nm Self Synchronous System," in Proceedings of IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 53-57,Dec. 2011.
  • S. Bushnaq, M. Ikeda, and K. Asada., "All-digital 400∼900 MHz power amplifier consuming 0.03 mW/MHz using 0.18 μm CMOS," in Proceedings of IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 607-610,Dec. 2011.
  • T. J. Yamaguchi, M. Soma, T. Aoki, Y. Furukawa, K. Degawa, K. Asada, M. Abbas, S. Komatsu, "Application of a continuous-time level crossing quantization method for timing noise measurements," 2011 IEEE International Test Conference (ITC), Sep. 2011.
  • J. Kim, T. Nakura, H. Takata, K. Ishibashi, M. Ikeda, and K. Asada "On-Chip Resonant Supply Noise Reduction Utilizing Switched Parasitic Capacitors of Sleep Blocks with Tri-Mode Power Gating Structure" in Proceedings of IEEE European Solid-State Circuit Conference (ESSCIRC), pp.183-186, Sep. 2011,
  • K. Kodama, T. Iizuka, and K. Asada, "A High Frequency Resolution Digitally Controlled Oscillator Using Single-Period Switching Scheme" in Proceedings of IEEE European Solid-State Circuit Conference (ESSCIRC), pp.399-402, Sep. 2011,
  • T. Kikkawa, T. Nakura, and K. Asada "An Automatic Phase Control Circuit with DLL-like Architecture for Phased Array Antenna Systems" Asia Symposium on Quality Electronic Design (ASQED), Kuala Lumpur, Malaysia, Sep. 2011.
  • N. N. Mai Khanh, Masahiro SASAKI, and Kunihiro ASADA "A Millimeter-wave Resistorless Pulse Generator with a New On-chip Dipole Patch Antenna in 65-nm CMOS," the 9th IEEE NEWCAS, France, The 3rd place of Best Student Paper Award, Sep. 2011.
  • T. Kikkawa, T. Nakura, and K. Asada "An Automatic Phase Control Circuit with DLL-like Architecture for Phased Array Antenna Systems" Asia Symposium on Quality Electronic Design (ASQED), Kuala Lumpur, Malaysia, Best Paper Award Sep. 2011.
  • B.S. Devlin, M. Ikeda, and K. Asada, "Energy Minimum Operation in a Reconfigurable Gate-level Pipelined and Power-Gated Self Synchronous FPGA," in Proceedings of International Symposium on Low Power Electronics and Design (ISLPED), pp. 3-8, Aug. 2011.
  • T. Iizuka and K. Asada, "All-Digital PMOS and NMOS Process Variability Monitor Utilizing Shared Buffer Ring and Ring Oscillator," IEICE Technical Report, vol. 111, no. 151, pp. 63-68,Jul. 2011.
  • J. Kim, T. Nakura, H. Takata, K. Ishibashi, M. Ikeda, and K. Asada, "On-Chip Resonant Supply Noise Reduction Using Active Decoupling Capacitors," IEICE Technical Report, vol. 111, no. 151, pp. 69-72,Jul. 2011.
  • N.N.M. Khanh, M. Sasaki, and K. Asada "A Millimeter-Wave Resistor-less Pluse Generator with a New Diple-Patch Antenna in 65-nm CMOS," IEEE International NEWCAS conference, Jun. 2011.
TOP
← Previous
Next →
END