- Y. Nakashima, M. Ikeda, and K. Asada,
"New method for calculating inductance on VLSI circuit,"
電子情報通信学会総合大会, pp.83, A-3-15, Mar. 2000,
- H. Yamaoka, M. Ikeda, and K. Asada,
"A High-Speed PLA with Latch Sense Amplifiers,"
電子情報通信学会総合大会, C-12-16, p. 111, Mar. 2000,
- T. Nezuka, T. Fujita, M. Ikeda, and K. Asada,
"A Binary Image Sensor with Flexible Motion Vector Detection using Block Matching Method,"
Proceedings of ASP-DAC 2000, University LSI Design Contest, A1.11, pp.21-22, Feb. 2000,
- T. Ishihara and K. Asada,
"A Memory Power Reduction Technique for Core-base System LSIs,"
電子情報通信学会 技術研究報告 VLD2000-85, VLD200-85, pp.95-100, 2000,
- M. Ikeda and K. Asada,
"A New Trial on HDL Exercise Class for Undergraduate School in EE Department,"
Proc. of 2000 European Workshop on Microelectronics Education(EWME 2000) in France, pp. 146--147, 2000,
- M. Ikeda, H. Aoki, and K. Asada,
"Voltage Bounce Testing in Power Supply Lines Using Onchip Voltage Scan Path,"
Technical Report of IEICE., CPM99-121, ICD99-127, pp. 9-14, Dec. 1999,
- T. Nezuka, M. Ikeda, and K. Asada,
"A Gray-Scale Image Sensor for Sub-pixel Level Motion Detection and Stereo Vision,"
Proceedings of 3rd Workshop on System VLSI in Biwako, pp.183-185, Nov. 1999,
- K. Asada,
"Associative momory with minimum hammingdistance detector and its application to bus data encoding,"
Proc. of AP-ASIC 99, 16.1, Aug. 1999,
- M. Ikeda and K. Asada,
"Standard Design Flows of Logic LSIs in Japanese Universities and VDEC,"
Proc. of 1999 Micro Electronic Systems Education Conference (MSE 99), pp. 8-9, Jul. 1999,
- M. Ikeda and K. Asada,
"Standard Cell Library Generation and Standard Design Flow Establishment Through VDEC Chip Fabrication Pilot Project,"
Proceding of '99 DA Symposium, pp. 149-152, Jul. 1999,
- K. Seto, M. Ikeda, and K. Asada,
"Logic Resynthesis using SPFDs for Standard Cell ICs,"
DA Symposium '99, , Jul. 1999,
- M. Ikeda and K. Asada,
"Standard Cell Library Generation and Standard Design Flow Establishment Through VDEC Chip Fabrication Pilot Project,"
Proceding of '99 DA Symposium, pp. 149-152, Jul. 1999,
- M. Ikeda,
"VDEC activities of these 3 years,"
1999年電子情報通信学会総合大会, PA-2-1, pp. 527-528, Mar. 1999,
- H. Ito and K. Asada,
"Accuracy of device-parameter extraction method using S-factor characteristics in FD-SOI MOSFETs,"
第46回応用物理学会関係連合講演会, 30p-ZM-9, Mar. 1999,
- J. Qiao and K. Asada,
"Multiple-output decomposition and its application to LUT-based FPGAs,"
1999年電子情報通信学会総合大会, A-3-6, p. 110, Mar. 1999,
- T. Yamashita and K. Asada,
"High Speed Pass-transistor Logic with Capacitor separated sense amplifire,"
1999年電子情報通信学会総合大会, C-12-16, p.114, Mar. 1999,
- K. Seto, M. Ikeda, and K. Asada,
"Logic Resynthesis of Standard Cell ICs using SPFDs for timing optimization,"
情報処理学会全国大会, pp. 39-40, Mar. 1999,
- H. Aoki, M. Ikeda, and K. Asada,
"Circuit for Measuring Noise in VLSI Power Lines,"
1999年電子情報通信学会総合大会, A-3-13, p. 117, Mar. 1999,
- T. Mido, H. Ito, and K. Asada,
"TEST Structure for Direct Extraction of Capacitance Matrix in VLSI,"
Proceeding of International Conference on Microelectronic Test Structures (ICMTS), pp.200-205, Mar. 1999,
- S. Komatsu, M. Ikeda, and K. Asada,
"Low Power Chip Interface Based on Bus Data Encoding with Adaptive Code-Book Method,"
9th GREAT LAKES SYMPOSIUM ON VLSI, 9B.1, pp. 368-371, Mar. 1999,