Ikeda Lab.

Conference

会議等での発表

  • T. Mido and K. Asada, "An Analysis on Hi-Frequenacy Interconnection in VLSI Considering Inductive Effects," International Workshop on Timing Issues In the Specification and Synthesis of Digital Systems (TAU'99), pp.173-178, Mar. 1999,
  • T. Nezuka, M. Ikeda, and K. Asada, "A Motion Detection Image Sensor with Variable Block Access,," Procedding of the 1999 IEICE General Conference, p.154, Mar., 1999., C-12-56, p.154, Mar. 1999,
  • K. Asada, T. Nezuka, T. Fujita, M. Ikeda, and J. Akita, "Image sensors with flexible access methods to pixels for adaptive spatial and time resolution,," International Symposium on Future of Intellectual Integrated Electronics,, pp49-62, Mar. 1999,
  • K. Asada, T. Nezuka, ,T. Fujita, M. Ikeda, and J. Akita, "An Image Sensor for Motion Detection using Variable Block Access," International Symposium on Future of Intellectual Integrated Electronics, ex.12, Mar. 1999,
  • T. Nezuka, T. Fujita, M. Ikeda, and K. Asada, "A Binary Image Sensor for Motion Detection," Proceedings of JSME Conference on Robotics and Mechatronics, 1999,
  • H. Ito and K. Asada, "Non-destructive Extraction of Structural Parameters of Fully-depleted SOI MOSFETs using Subthreshold Slope Characteristics," 1998 Conference on Optolectronics and Microelectronics Materials and Devices, Dec. 1998,
  • R. Zheng and K. Asada, "A High Speed Completion Prediction Adder Based on Binary Carry Lookahead Adder," Proceeding of International Workshop on IP Based Synthesis and System Design, Grenable , Dec. 1998,
  • M. Ikeda and K. Asada, "CAM Macro Cells with Minimum Distance Detector using Time-Domain Technique," International Workshop on IP Based Synthesis and System Design , pp.134-140, Dec. 1998,
  • T. Nezuka, M. Ikeda, and K. Asada, " A Gray-Scale Image sensor with Hierarchical Access Path ," 2nd Workshop on System LSI in Biwako, p.227-230, Dec. 1998,
  • T. Yamashita and K. Asada, "High Speed Pass-transistor Logic with Capacitor separated sense amplifire," 第2回システムLSI琵琶湖ワークショップ For the Interdisciplinary Materials Research, pp.233-235, Nov. 1998,
  • T. Nezuka and K. Asada, "An Image Sensor for Motion Compensation with Hierarchical Scan,," Technical Report of IEICE., DSP98-95, pp.43-48, Oct., 1998., Vol.98,No.318,DSP98-95,p.43-48, Oct. 1998,
  • T. Mido and K. Asada, "An Evaluation of Skin Effect on Hi-Frequency VLSI Interconnections using Numerical Simulation," 第45回応用物理学会関係連合講演会. , 28p-L-8, p.11, Oct. 1998,
  • T. Mido and K. Asada, "An Analysis on Hi-Frequency Interconnections in VLSI Considering Skin Effect," 通信学会VLSI設計研究会、信学技報, VLD98-84、Vol.98、No.2 pp.89-94, Oct. 1998,
  • H. Ito and K. Asada, "Device parameter extraction using subthreshold slope factor characteristics in SOI MOSFETs," 第59回応用物理学会学術講演会, 15a-P9/II p.778, Oct. 1998,
  • S. Komatsu, M. Ikeda, and K. Asada, "Adaptive Code-Book Encoding for Low Power Chip-Interface," 1998年電子情報通信学会ソサイエティ大会, C12-23, pp.114, Oct. 1998,
  • K. Asada, T. Nezuka, and M. Ikeda, "A High Speed CMOS Image Sensor with Hierarchical Access Path," 1998年電子情報通信学会ソサイエティ大会, SC-10-5,pp184-185, Sep. 1998,
  • K. Asada, T. Nezuka, and M. Ikeda, "A High Speed CMOS Image Sensor with Hierarchical Access Path," 1998年電子情報通信学会ソサイエティ大会講演論文集Proceedings of the 1998 Electronics Society Conference of IEICE, Pergamon, SC-10-5, p.184-185,, Sep. 1998,
  • R. Zheng and K. Asada, "Design of Completion Prediction Adder with Shift Operation and Its Aoolication to Microcessor ," 通信学会、信学技報, VLD98-51, pp.51-56, Sep. 1998,
  • R. Zheng and K. Asada, "Design of a Completion Adder," 通信学会全国大会講演論文集, C-12-22, pp.113, Sep. 1998,
  • T. Mido, H. Ito, and K. Asada, "TEST Structure for Direct Extraction of Capacitance Matrix in VLSI," 1998 IEICE Fall Conference, C-12-1, pp.92, Sep. 1998,